Wednesday, September 10, 2014
Scarce Level Power Fet Driver Method Wiring diagram Schematic
This is the Scarce Level Power Fet Driver Method Circuit Diagram. This schema operates from a 16- to 50-V supply. Adding the buffer schema (within the dashed lines) offers 100-ns switching times. Otherwise, the schema switches in 1 /xs. Ql and R1 form a switched current source of about 12 mA.
The current flows through R2, which supplies 12 V to the FET. The schema works well over a wide range of supply voltages. Furthermore, it switches smoothly in the presence of large ripple and noise on the supply.
Scarce Level Power Fet Driver Method Circuit Diagram
The switching time (about 1 /as) can be reduced considerably by lowering the values of Ri and R2 at the expense of higher power dissipation in the resistors and Ql. Alternatively, a buffer schema can be added to produce switching times of 100 ns without generating significant power dissipation.